Xaoc Drezno Bedienungsanleitung


Lesen Sie kostenlos die ๐Ÿ“– deutsche Bedienungsanleitung fรผr Xaoc Drezno (8 Seiten) in der Kategorie Nicht kategorisiert. Dieser Bedienungsanleitung war fรผr 11 Personen hilfreich und wurde von 2 Benutzern mit durchschnittlich 4.5 Sternen bewertet

Seite 1/8
binary
conversion
komputor
& bit inversion
commander
Models of 1989
operatorโ€™s manual rev. 1989/1.0
๎€‡๎‚”๎‚‡๎‚œ๎‚๎‚‘๎€ƒ๎‚ƒ๎‚๎‚†๎€ƒ๎€๎‚‹๎‚’๎‚•๎‚๎€ƒ๎‚ƒ๎‚”๎‚‡๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎”๎‚‹๎‚”๎‚•๎‚–๎€ƒ๎‚‹๎‚๎€ƒ๎‚•๎‚‡๎‚”๎‚‹๎‚‡๎‚•๎€ƒ๎‚‘๎‚ˆ๎€ƒ๎‚๎‚‘๎‚†๎‚—๎‚Ž๎‚‡๎‚•๎€ƒ
๎‚™๎‚Š๎‚‹๎‚…๎‚Š๎€ƒ๎‚…๎‚‘๎‚๎‚•๎‚–๎‚‹๎‚–๎‚—๎‚–๎‚‡๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ๎€๎‚‡๎‚‹๎‚„๎‚๎‚‹๎‚œ๎€ƒ๎€…๎‚‹๎‚๎‚ƒ๎‚”๎‚›๎€ƒ๎€–๎‚—๎‚„๎‚•๎‚›๎‚•๎‚–๎‚‡๎‚๎‡ก๎€ƒ๎‚ƒ๎€ƒ
group of 8-bit signal processing devices offering
comprehensive digital signal manipulation, as well
as audio signal, control voltage, trigger, and gate
generation. Drezno is the input/output front-end
of the system, consisting of an analogโ€“toโ€“digital
๎‚…๎‚‘๎‚๎‚˜๎‚‡๎‚”๎‚–๎‚‡๎‚”๎€ƒ๎ˆ‹๎€„๎€‡๎€†๎ˆŒ๎€ƒ๎‚ƒ๎‚๎‚†๎€ƒ๎‚ƒ๎€ƒ๎‚†๎‚‹๎‚‰๎‚‹๎‚–๎‚ƒ๎‚Ž๎ˆ‚๎‚–๎‚‘๎ˆ‚๎‚ƒ๎‚๎‚ƒ๎‚Ž๎‚‘๎‚‰๎€ƒ๎‚…๎‚‘๎‚๎‚˜๎‚‡๎‚”๎‚–-
๎‚‡๎‚”๎€ƒ๎ˆ‹๎€‡๎€„๎€†๎ˆŒ๎‡ก๎€ƒ๎‚–๎‚Š๎‚ƒ๎‚–๎€ƒ๎‚ƒ๎‚Ž๎‚‘๎‚๎‚‡๎€ƒ๎‚…๎‚ƒ๎‚๎€ƒ๎‚„๎‚‡๎€ƒ๎‚—๎‚•๎‚‡๎‚†๎€ƒ๎‚ˆ๎‚‘๎‚”๎€ƒ๎‚๎‚ƒ๎‚๎‚‹๎‚’๎‚—๎‚Ž๎‚ƒ๎‚–๎‚‹๎‚๎‚‰๎€ƒ
analog signals and voltages based on their binary
๎‚”๎‚‡๎‚’๎‚”๎‚‡๎‚•๎‚‡๎‚๎‚–๎‚ƒ๎‚–๎‚‹๎‚‘๎‚๎€ƒ ๎ˆ‹๎‚•๎‚‡๎‚‡๎‡ฃ๎€ƒ ๎‡ฎ๎€…๎‚‹๎‚๎‚ƒ๎‚”๎‚›๎€ƒ ๎€†๎‚‘๎‚†๎‚‡๎‡ฏ๎€ƒ ๎‚’๎‚ƒ๎‚”๎‚ƒ๎‚‰๎‚”๎‚ƒ๎‚’๎‚Š๎ˆŒ๎‡ค๎€ƒ
๎€๎‚‹๎‚’๎‚•๎‚๎€ƒ๎ˆ‹๎‚•๎‚‘๎‚Ž๎‚†๎€ƒ๎‚•๎‚‡๎‚’๎‚ƒ๎‚”๎‚ƒ๎‚–๎‚‡๎‚Ž๎‚›๎ˆŒ๎€ƒ๎‚‹๎‚•๎€ƒ๎‚ƒ๎€ƒ๎‚„๎‚‹๎‚๎‚ƒ๎‚”๎‚›๎€ƒ๎‚Ž๎‚‘๎‚‰๎‚‹๎‚…๎€ƒ๎‚’๎‚”๎‚‘๎‚…๎‚‡๎‚•๎‚•๎‚‹๎‚๎‚‰๎€ƒ
๎‚‡๎‚š๎‚’๎‚ƒ๎‚๎‚†๎‚‡๎‚”๎€ƒ๎‚๎‚‘๎‚†๎‚—๎‚Ž๎‚‡๎€ƒ๎‚–๎‚Š๎‚ƒ๎‚–๎€ƒ๎‚…๎‚ƒ๎‚๎€ƒ๎”๎‚Ž๎‚‹๎‚’๎€ƒ๎ˆ‹๎‚‹๎‚๎‚˜๎‚‡๎‚”๎‚–๎ˆŒ๎€ƒ๎‚‹๎‚๎‚†๎‚‹๎‚˜๎‚‹๎‚†๎‚—๎‚ƒ๎‚Ž๎€ƒ
bits of the digital signal representation.
๎€‡๎‚”๎‚‡๎‚œ๎‚๎‚‘๎€ƒ๎‚”๎‚‡๎‚“๎‚—๎‚‹๎‚”๎‚‡๎‚•๎€ƒ๎ท๎ธ๎‚Š๎‚’๎€ƒ๎‚™๎‚‘๎‚”๎‚–๎‚Š๎€ƒ๎‚‘๎‚ˆ๎€ƒ๎‚ˆ๎‚”๎‚‡๎‚‡๎€ƒ๎‚•๎‚’๎‚ƒ๎‚…๎‚‡๎€ƒ๎‚‹๎‚๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚‡๎‚—-
๎‚”๎‚‘๎‚”๎‚ƒ๎‚…๎‚๎€ƒ๎‚…๎‚ƒ๎‚„๎‚‹๎‚๎‚‡๎‚–๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ๎‚”๎‚‹๎‚„๎‚„๎‚‘๎‚๎€ƒ๎‚–๎‚›๎‚’๎‚‡๎€ƒ๎‚’๎‚‘๎‚™๎‚‡๎‚”๎€ƒ๎‚…๎‚ƒ๎‚„๎‚Ž๎‚‡๎€ƒ๎‚๎‚—๎‚•๎‚–๎€ƒ
be plugged into the bus board, paying close atten-
๎‚–๎‚‹๎‚‘๎‚๎€ƒ๎‚–๎‚‘๎€ƒ๎‚’๎‚‘๎‚Ž๎‚ƒ๎‚”๎‚‹๎‚–๎‚›๎€ƒ๎‚‘๎‚”๎‚‹๎‚‡๎‚๎‚–๎‚ƒ๎‚–๎‚‹๎‚‘๎‚๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ๎‚”๎‚‡๎‚†๎€ƒ๎‚•๎‚–๎‚”๎‚‹๎‚’๎‚‡๎€ƒ๎‚‹๎‚๎‚†๎‚‹๎‚…๎‚ƒ๎‚–๎‚‡๎‚•๎€ƒ
the negative 12V rail and should align with the dot,
โ€“12V, or red stripe marks on both the unit and
๎‚–๎‚Š๎‚‡๎€ƒ๎‚„๎‚—๎‚•๎€ƒ๎‚„๎‚‘๎‚ƒ๎‚”๎‚†๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ๎‚๎‚‘๎‚†๎‚—๎‚Ž๎‚‡๎€ƒ๎‚‹๎‚–๎‚•๎‚‡๎‚Ž๎‚ˆ๎€ƒ๎‚‹๎‚•๎€ƒ๎‚•๎‚‡๎‚…๎‚—๎‚”๎‚‡๎‚†๎€ƒ๎‚ƒ๎‚‰๎‚ƒ๎‚‹๎‚๎‚•๎‚–๎€ƒ
reversed power connection, however reversing the
16-pin header may cause serious damage to oth-
er components of your system by short-circuiting the
๎Žฎ๎ท๎ธ๎€™๎€ƒ๎‚ƒ๎‚๎‚†๎€ƒ๎Žฎ๎ป๎€™๎€ƒ๎‚’๎‚‘๎‚™๎‚‡๎‚”๎€ƒ๎‚”๎‚ƒ๎‚‹๎‚Ž๎‚•๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎‚”๎‚‡๎€ƒ๎‚ƒ๎‚”๎‚‡๎€ƒ๎‚–๎‚™๎‚‘๎€ƒ๎‚…๎‚‘๎‚๎‚๎‚‡๎‚…๎‚–๎‚‹๎‚‘๎‚๎€ƒ
๎‚Š๎‚‡๎‚ƒ๎‚†๎‚‡๎‚”๎‚•๎€ƒ๎‚‘๎‚๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚„๎‚ƒ๎‚…๎‚๎€ƒ๎€“๎€†๎€…๎€ƒ๎‚‘๎‚ˆ๎€ƒ๎€‡๎‚”๎‚‡๎‚œ๎‚๎‚‘๎€ƒ๎‚ˆ๎‚‘๎‚”๎€ƒ๎‚…๎‚‘๎‚๎‚๎‚‡๎‚…๎‚–๎‚‹๎‚๎‚‰๎€ƒ
Lipsk or more expansion modules to form an out-
๎‚‹๎‚๎€ƒ๎‚Ž๎‚‘๎‚‘๎‚’๎€ƒ๎ˆ‹๎‚•๎‚‡๎‚‡๎€ƒ๎”๎‚‹๎‚‰๎‡ค๎€ƒ๎น๎ˆŒ๎‡ค๎€ƒ๎€๎‚‹๎‚’๎‚•๎‚๎€ƒ๎‚”๎‚‡๎‚“๎‚—๎‚‹๎‚”๎‚‡๎‚•๎€ƒ๎ผ๎‚Š๎‚’๎€ƒ๎‚‘๎‚ˆ๎€ƒ๎‚•๎‚’๎‚ƒ๎‚…๎‚‡๎‡ก๎€ƒ๎‚ƒ๎‚๎‚†๎€ƒ
๎‚๎‚—๎‚•๎‚–๎€ƒ๎‚„๎‚‡๎€ƒ๎‚…๎‚‘๎‚๎‚๎‚‡๎‚…๎‚–๎‚‡๎‚†๎€ƒ๎‚–๎‚‘๎€ƒ๎€‡๎‚”๎‚‡๎‚œ๎‚๎‚‘๎€ƒ๎ˆ‹๎‚ƒ๎‚๎‚†๎€ƒ๎‚•๎‚—๎‚„๎‚•๎‚‡๎‚“๎‚—๎‚‡๎‚๎‚–๎€ƒ๎‚‡๎‚š-
๎‚’๎‚ƒ๎‚๎‚†๎‚‡๎‚”๎‚•๎ˆŒ๎€ƒ๎‚—๎‚•๎‚‹๎‚๎‚‰๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎ท๎ถ๎‡ฆ๎‚’๎‚‹๎‚๎€ƒ๎‚‹๎‚๎‚–๎‚‡๎‚”๎‚…๎‚‘๎‚๎‚๎‚‡๎‚…๎‚–๎‚‘๎‚”๎€ƒ๎‚…๎‚ƒ๎‚„๎‚Ž๎‚‡๎€ƒ๎‚’๎‚”๎‚‘-
๎‚˜๎‚‹๎‚†๎‚‡๎‚†๎‡ค๎€ƒ๎€‰๎‚—๎‚”๎‚–๎‚Š๎‚‡๎‚”๎‚๎‚‘๎‚”๎‚‡๎‡ก๎€ƒ๎€๎‚‹๎‚’๎‚•๎‚๎€ƒ๎‚”๎‚‡๎‚“๎‚—๎‚‹๎‚”๎‚‡๎‚•๎€ƒ๎‚‹๎‚–๎‚•๎€ƒ๎‚‘๎‚™๎‚๎€ƒ๎‚’๎‚‘๎‚™๎‚‡๎‚”๎€ƒ๎‚…๎‚ƒ-
๎‚„๎‚Ž๎‚‡๎€ƒ๎‚–๎‚‘๎€ƒ๎‚„๎‚‡๎€ƒ๎‚…๎‚‘๎‚๎‚๎‚‡๎‚…๎‚–๎‚‡๎‚†๎€ƒ๎‚–๎‚‘๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚„๎‚—๎‚•๎€ƒ๎‚„๎‚‘๎‚ƒ๎‚”๎‚†๎‡ค๎€ƒ๎€…๎‚‘๎‚–๎‚Š๎€ƒ๎‚๎‚‘๎‚†๎‚—๎‚Ž๎‚‡๎‚•๎€ƒ
should be fastened by mounting the supplied screws
๎‚„๎‚‡๎‚ˆ๎‚‘๎‚”๎‚‡๎€ƒ๎‚’๎‚‘๎‚™๎‚‡๎‚”๎‚‹๎‚๎‚‰๎€ƒ๎‚—๎‚’๎‡ค๎€ƒ๎€—๎‚‘๎€ƒ๎‚„๎‚‡๎‚–๎‚–๎‚‡๎‚”๎€ƒ๎‚—๎‚๎‚†๎‚‡๎‚”๎‚•๎‚–๎‚ƒ๎‚๎‚†๎€ƒ๎‚–๎‚Š๎‚‡๎‚•๎‚‡๎€ƒ๎‚†๎‚‡-
vices, we strongly advise the user to read through the
entire manual before using the modules.
๎€…๎‚‹๎‚๎‚ƒ๎‚”๎‚›๎€ƒ ๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎‚”๎‚‡๎‚’๎‚”๎‚‡๎‚•๎‚‡๎‚๎‚–๎‚•๎€ƒ ๎‚˜๎‚‘๎‚Ž๎‚–๎‚ƒ๎‚‰๎‚‡๎€ƒ ๎‚˜๎‚ƒ๎‚Ž๎‚—๎‚‡๎‚•๎€ƒ ๎‚—๎‚•๎‚‹๎‚๎‚‰๎€ƒ ๎‚’๎‚ƒ๎‚–-
๎‚–๎‚‡๎‚”๎‚๎‚•๎€ƒ๎‚‘๎‚ˆ๎€ƒ๎‚„๎‚‹๎‚๎‚ƒ๎‚”๎‚›๎€ƒ ๎‚•๎‚›๎‚๎‚„๎‚‘๎‚Ž๎‚•๎€ƒ๎ˆ‹๎‚„๎‚‹๎‚–๎‚•๎ˆŒ๎‡ก๎€ƒ๎‚‡๎‚ƒ๎‚…๎‚Š๎€ƒ๎‚Š๎‚ƒ๎‚˜๎‚‹๎‚๎‚‰๎€ƒ ๎‚‘๎‚๎‚‡๎€ƒ๎‚‘๎‚ˆ๎€ƒ
๎‚–๎‚™๎‚‘๎€ƒ๎‚’๎‚‘๎‚•๎‚•๎‚‹๎‚„๎‚Ž๎‚‡๎€ƒ๎‚•๎‚–๎‚ƒ๎‚–๎‚‡๎‚•๎‡ฃ๎€ƒ๎ถ๎€ƒ๎‚‘๎‚”๎€ƒ๎ท๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎‚•๎‚‡๎€ƒ๎‚„๎‚‹๎‚–๎‚•๎€ƒ๎‚ƒ๎‚”๎‚‡๎€ƒ๎‚‘๎‚”๎‚‰๎‚ƒ๎‚๎‚‹๎‚œ๎‚‡๎‚†๎€ƒ
๎‚‹๎‚๎‚–๎‚‘๎€ƒ๎‚•๎‚–๎‚”๎‚‹๎‚๎‚‰๎‚•๎€ƒ๎‚‹๎‚๎€ƒ๎‚‘๎‚”๎‚†๎‚‡๎‚”๎€ƒ๎‚ˆ๎‚”๎‚‘๎‚๎€ƒ๎‚๎‚‘๎‚•๎‚–๎€ƒ๎‚•๎‚‹๎‚‰๎‚๎‚‹๎”๎‚‹๎‚…๎‚ƒ๎‚๎‚–๎€ƒ๎‚„๎‚‹๎‚–๎€ƒ๎ˆ‹๎‚„ N-1
๎ˆŒ๎€ƒ
๎‚–๎‚‘๎€ƒ๎‚Ž๎‚‡๎‚ƒ๎‚•๎‚–๎€ƒ๎‚•๎‚‹๎‚‰๎‚๎‚‹๎”๎‚‹๎‚…๎‚ƒ๎‚๎‚–๎€ƒ๎‚„๎‚‹๎‚–๎€ƒ๎ˆ‹๎‚„0๎ˆŒ๎‡ค๎€ƒ๎€‰๎‚‘๎‚”๎€ƒ๎‚‡๎‚š๎‚ƒ๎‚๎‚’๎‚Ž๎‚‡๎‡ก๎€ƒ๎‚ƒ๎€ƒ๎น๎‡ฆ๎‚„๎‚‹๎‚–๎€ƒ๎‚…๎‚‘๎‚†๎‚‡๎€ƒ
๎‚…๎‚ƒ๎‚๎€ƒ๎‚”๎‚‡๎‚’๎‚”๎‚‡๎‚•๎‚‡๎‚๎‚–๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚˜๎‚ƒ๎‚Ž๎‚—๎‚‡๎‚•๎€ƒ๎ถ๎€ƒ๎ˆ‹๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎ถ๎ถ๎ถ๎ˆŒ๎‡ก๎€ƒ๎ท๎€ƒ๎ˆ‹๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎ถ๎ถ๎ท๎ˆŒ๎‡ก๎€ƒ
๎ธ๎€ƒ๎ˆ‹๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎ถ๎ท๎ถ๎ˆŒ๎‡ก๎€ƒ๎น๎€ƒ๎ˆ‹๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎ถ๎ท๎ท๎ˆŒ๎€ƒ๎‡ค๎‡ค๎‡ค๎€ƒ๎‚—๎‚’๎€ƒ๎‚–๎‚‘๎€ƒ๎ฝ๎€ƒ๎ˆ‹๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎ท๎ท๎ท๎ˆŒ๎‡ค๎€ƒ๎€Œ๎‚๎€ƒ
an 8-bit system, there are 256 possible values, from
๎ถ๎€ƒ๎ˆ‹๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎ถ๎ถ๎ถ๎ถ๎ถ๎ถ๎ถ๎ถ๎ˆŒ๎€ƒ ๎‚–๎‚‘๎€ƒ ๎ธ๎ป๎ป๎€ƒ ๎ˆ‹๎‚…๎‚‘๎‚†๎‚‡๎€ƒ๎ท๎ท๎ท๎ท๎ท๎ท๎ท๎ท๎ˆŒ๎‡ค๎€ƒ ๎€—๎‚Š๎‚‡๎€ƒ
๎‚๎‚‘๎‚•๎‚–๎€ƒ๎‚•๎‚‹๎‚‰๎‚๎‚‹๎”๎‚‹๎‚…๎‚ƒ๎‚๎‚–๎€ƒ๎‚„๎‚‹๎‚–๎€ƒ๎ˆ‹๎‚„๎ฝ๎ˆŒ๎€ƒ๎‚‹๎‚๎‚ˆ๎‚‘๎‚”๎‚๎‚•๎€ƒ๎‚™๎‚Š๎‚‡๎‚–๎‚Š๎‚‡๎‚”๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚•๎‚‹๎‚‰๎‚๎‚ƒ๎‚Ž๎€ƒ
value is in the top or bottom half of the range, and
๎‚‡๎‚ƒ๎‚…๎‚Š๎€ƒ๎‚•๎‚—๎‚„๎‚•๎‚‡๎‚“๎‚—๎‚‡๎‚๎‚–๎€ƒ๎‚„๎‚‹๎‚–๎€ƒ๎‚†๎‚‡๎‚•๎‚…๎‚”๎‚‹๎‚„๎‚‡๎‚•๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚˜๎‚ƒ๎‚Ž๎‚—๎‚‡๎€ƒ๎‚‹๎‚๎€ƒ๎‚‰๎‚”๎‚‡๎‚ƒ๎‚–๎‚‡๎‚”๎€ƒ
๎‚†๎‚‡๎‚–๎‚ƒ๎‚‹๎‚Ž๎€ƒ ๎ˆ‹๎”๎‚‹๎‚‰๎‡ค๎€ƒ ๎บ๎€ƒ๎†ฌ๎€ƒ ๎ป๎ˆŒ๎‡ค๎€ƒ ๎€Œ๎‚๎€ƒ๎‚ƒ๎‚๎€ƒ ๎พ๎‡ฆ๎‚„๎‚‹๎‚–๎€ƒ ๎‚๎‚‘๎‚†๎‚—๎‚Ž๎‚ƒ๎‚”๎€ƒ ๎‚•๎‚›๎‚๎‚–๎‚Š๎‚‡๎‚•๎‚‹๎‚•๎€ƒ
system, the individual bits are represented as gate
๎‚•๎‚‹๎‚‰๎‚๎‚ƒ๎‚Ž๎‚•๎€ƒ๎ˆ‹๎‚„๎‚‹๎‚๎‚ƒ๎‚”๎‚›๎€ƒ ๎ถ๎Žต๎ถ๎€™๎‡ก๎€ƒ๎‚„๎‚‹๎‚๎‚ƒ๎‚”๎‚›๎€ƒ๎ท๎Žต๎ป๎€™๎ˆŒ๎‡ค๎€ƒ๎€‹๎‚‡๎‚๎‚…๎‚‡๎€ƒ ๎‚–๎‚Š๎‚‡๎€ƒ๎‚‹๎‚-
coming analog voltage is converted into eight gates.
๎€‡๎‚”๎‚‡๎‚œ๎‚๎‚‘๎€ƒ๎‚…๎‚‘๎‚๎‚•๎‚‹๎‚•๎‚–๎‚•๎€ƒ๎‚‘๎‚ˆ๎€ƒ๎‚–๎‚™๎‚‘๎€ƒ๎‚•๎‚‡๎‚…๎‚–๎‚‹๎‚‘๎‚๎‚•๎€ƒ๎ˆ‹๎‚•๎‚‡๎‚‡๎€ƒ๎”๎‚‹๎‚‰๎‡ค๎€ƒ๎ท๎ˆŒ๎€ƒ๎‚–๎‚Š๎‚ƒ๎‚–๎€ƒ๎‚…๎‚ƒ๎‚๎€ƒ
๎‚ƒ๎‚…๎‚–๎€ƒ๎‚‡๎‚๎‚–๎‚‹๎‚”๎‚‡๎‚Ž๎‚›๎€ƒ๎‚‹๎‚๎‚†๎‚‡๎‚’๎‚‡๎‚๎‚†๎‚‡๎‚๎‚–๎‚Ž๎‚›๎€ƒ๎‚‘๎‚”๎€ƒ๎‚ƒ๎‚•๎€ƒ๎‚ƒ๎€ƒ๎‚Ž๎‚‹๎‚๎‚๎‚‡๎‚†๎€ƒ๎‚’๎‚ƒ๎‚‹๎‚”๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ
ADC input expects either audio or CV signals.
๎€—๎‚Š๎‚‡๎‚”๎‚‡๎€ƒ๎‚ƒ๎‚”๎‚‡๎€ƒ๎‚‡๎‚‹๎‚‰๎‚Š๎‚–๎€ƒ๎€„๎€‡๎€†๎€ƒ๎‚‰๎‚ƒ๎‚–๎‚‡๎€ƒ๎‚‘๎‚—๎‚–๎‚’๎‚—๎‚–๎‚•๎€ƒ , represent-
ing each of the eight bits, 7 to 0๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ๎‚‹๎‚Ž๎‚Ž๎‚—๎‚๎‚‹๎‚๎‚ƒ๎‚–๎‚‡๎‚†๎€ƒ
gain and offset sliders allow the user to
adapt the range of the signal fed to the A/D con-
๎‚˜๎‚‡๎‚”๎‚–๎‚‡๎‚”๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ๎‚•๎‚Ž๎‚‹๎‚†๎‚‡๎‚”๎‚•๎‡ฏ๎€ƒ๎‚”๎‚‡๎‚•๎‚’๎‚‡๎‚…๎‚–๎‚‹๎‚˜๎‚‡๎€ƒ๎€๎€ˆ๎€‡๎‚•๎€ƒ๎‚‹๎‚๎‚†๎‚‹๎‚…๎‚ƒ๎‚–๎‚‡๎€ƒ๎‚•๎‚‹๎‚‰๎‚๎‚ƒ๎‚Ž๎€ƒ
๎‚ƒ๎‚๎‚’๎‚Ž๎‚‹๎‚–๎‚—๎‚†๎‚‡๎€ƒ ๎‚ƒ๎‚๎‚†๎€ƒ ๎‚…๎‚Ž๎‚‹๎‚’๎‚’๎‚‹๎‚๎‚‰๎‡ค๎€ƒ ๎€—๎‚Š๎‚‡๎€ƒ๎€„๎ˆ€๎€‡๎€ƒ ๎‚…๎‚‘๎‚๎‚˜๎‚‡๎‚”๎‚–๎‚‡๎‚”๎€ƒ๎‚…๎‚Š๎‚‹๎‚’๎€ƒ
expects only positive voltages, so for bipolar input
signals, set the slider to the upper position. offset
๎€—๎‚Š๎‚‡๎€ƒ๎‚…๎‚‘๎‚๎‚˜๎‚‡๎‚”๎‚–๎‚‡๎‚”๎€ƒ๎‚‹๎‚•๎€ƒ๎‚‹๎‚๎‚–๎‚‡๎‚”๎‚๎‚ƒ๎‚Ž๎‚Ž๎‚›๎€ƒ๎‚…๎‚Ž๎‚‘๎‚…๎‚๎‚‡๎‚†๎€ƒ๎‚ƒ๎‚–๎€ƒ๎‚ƒ๎€ƒ๎‚˜๎‚‡๎‚”๎‚›๎€ƒ๎‚Š๎‚‹๎‚‰๎‚Š๎€ƒ
๎‚”๎‚ƒ๎‚–๎‚‡๎€ƒ๎ˆ‹๎‚๎‚‡๎‚ƒ๎‚”๎€ƒ๎ธ๎€๎€‹๎‚œ๎ˆŒ๎€ƒ๎‚™๎‚Š๎‚‹๎‚…๎‚Š๎€ƒ๎‚Š๎‚‡๎‚Ž๎‚’๎‚•๎€ƒ๎‚–๎‚‘๎€ƒ๎‚ƒ๎‚˜๎‚‘๎‚‹๎‚†๎€ƒ๎‚ƒ๎‚Ž๎‚‹๎‚ƒ๎‚•๎‚‹๎‚๎‚‰๎€ƒ๎‚ˆ๎‚‘๎‚”๎€ƒ
๎‚ƒ๎‚—๎‚†๎‚‹๎‚‘๎€ƒ๎‚”๎‚ƒ๎‚–๎‚‡๎€ƒ๎‚•๎‚‹๎‚‰๎‚๎‚ƒ๎‚Ž๎‚•๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒadc clock input allows
the user to override the internal clock by freezing
the output code at the rising edge of the input sig-
๎‚๎‚ƒ๎‚Ž๎€ƒ๎ˆ‹๎‚‹๎‡ค๎‚‡๎‡ค๎€ƒ๎‚‰๎‚ƒ๎‚–๎‚‡๎€ƒ๎‚‘๎‚”๎€ƒ๎‚–๎‚”๎‚‹๎‚‰๎‚‰๎‚‡๎‚”๎ˆŒ๎‡ค๎€ƒ๎€‰๎‚‡๎‚‡๎‚†๎‚‹๎‚๎‚‰๎€ƒ๎‚ƒ๎€ƒ๎‚’๎‚—๎‚Ž๎‚•๎‚‡๎€ƒ๎‚™๎‚ƒ๎‚˜๎‚‡๎€ƒ๎‚‹๎‚๎‚–๎‚‘๎€ƒ
the adc clock allows the user to control the ADC
sampling rate. ADC output activity is indicated by
the corresponding set of eight yellow LEDs .
๎€—๎‚Š๎‚‡๎€ƒ๎€‡๎€„๎€†๎€ƒ๎‚•๎‚‡๎‚…๎‚–๎‚‹๎‚‘๎‚๎€ƒ๎‚๎‚‹๎‚”๎‚”๎‚‘๎‚”๎‚•๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎€„๎€‡๎€†๎€ƒ๎‚•๎‚‡๎‚…๎‚–๎‚‹๎‚‘๎‚๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎‚”๎‚‡๎€ƒ๎‚ƒ๎‚”๎‚‡๎€ƒ
eight DAC gate inputs , representing each of the
eight bits numbered from 7 to 0๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒdac output
produces a CV or audio signal based on the input
๎‚…๎‚‘๎‚†๎‚‡๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒdac clock input expects gate/trigger
signals and is normalized to the ADC clock via the
ribbon cable connected to the expander sockets on
๎‚–๎‚Š๎‚‡๎€ƒ๎‚„๎‚ƒ๎‚…๎‚๎€ƒ๎‚‘๎‚ˆ๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚๎‚‘๎‚†๎‚—๎‚Ž๎‚‡๎€ƒ๎ˆ‹๎‚•๎‚‡๎‚‡๎€ƒ๎”๎‚‹๎‚‰๎‡ค๎€ƒ๎น๎ˆŒ๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎‚”๎‚‡๎‚ˆ๎‚‘๎‚”๎‚‡๎‡ก๎€ƒ๎€‡๎€„๎€†๎€ƒ
clock can be replaced by a clock produced by an ex-
pander module, and it can be overridden by any sig-
๎‚๎‚ƒ๎‚Ž๎€ƒ๎‚’๎‚ƒ๎‚–๎‚…๎‚Š๎‚‡๎‚†๎€ƒ๎‚‹๎‚๎‚–๎‚‘๎€ƒ๎‚–๎‚Š๎‚‡๎€ƒ๎‚’๎‚ƒ๎‚๎‚‡๎‚Ž๎€ƒ๎‚•๎‚‘๎‚…๎‚๎‚‡๎‚–๎‡ค๎€ƒ๎€—๎‚Š๎‚‡๎€ƒ๎€‡๎€„๎€†๎€ƒ๎‚•๎‚‡๎‚…๎‚–๎‚‹๎‚‘๎‚๎€ƒ
also features gain and offset sliders which
modules
explained
fig. 1
front panel
overview


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