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SN54ALVTH16240, SN74ALVTH16240

2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCES138A – JULY 1998 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

State-of-the-Art Advanced BiCMOS

Technology (ABT)

Widebus

 Design for

2.5-V and 3.3-V Operation and Low Static

Power Dissipation

Support Mixed-Mode Signal Operation (5-V

Input and Output Voltages With 2.3-V to

3.6-V VCC)

Typical VOLP (Output Ground Bounce)

<0.8 V at VCC = 3.3 V, TA = 25 C°

High Drive (–24/24 mA at 2.5-V and

–32/64 mA at 3.3-V VCC)

Power O Disables Outputs, Permitting

Live Insertion

High-Impedance State During Power Up

and Power Down Prevents Driver Conict

Use Bus Hold on Data Inputs in Place of

External Pullup/Pulldown Resistors to

Prevent the Bus From Floating

Auto3-State Eliminates Bus Current

Loading When Output Exceeds V CC + 0.5 V

Latch-Up Performance Exceeds 250 mA Per

JESD 17

ESD Protection Exceeds 2000 V Per

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model; and Exceeds 1000 V

Using Charged-Device Model, Robotic

Method

Flow-Through Architecture Facilitates

Printed Circuit Board Layout

Distributed VCC and GND Pin Conguration

Minimizes High-Speed Switching Noise

Package Options Include Plastic Shrink

Small-Outline (DL), Thin Shrink

Small-Outline (DGG), Thin Very

Small-Outline (DGV) Packages, and 380-mil

Fine-Pitch Ceramic Flat (WD) Package

description

The ’ALVTH16240 devices are 16-bit buers/line drivers designed for 2.5-V or 3.3-V V CC operation, but with

the capability to provide a TTL interface to a 5-V system environment.

These devices are designed specically to improve both the performance and density of 3-state memory

address drivers, clock drivers, and bus-oriented receivers and transmitters.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

1OE

1Y1

1Y2

GND

1Y3

1Y4

VCC

2Y1

2Y2

GND

2Y3

2Y4

3Y1

3Y2

GND

3Y3

3Y4

VCC

4Y1

4Y2

GND

4Y3

4Y4

4OE

2OE

1A1

1A2

GND

1A3

1A4

VCC

2A1

2A2

GND

2A3

2A4

3A1

3A2

GND

3A3

3A4

VCC

4A1

4A2

GND

4A3

4A4

3OE

SN54ALVTH16240 . . . WD PACKAGE

SN74ALVTH16240 . . . DGG, DGV, OR DL PACKAGE

(TOP VIEW)

Widebus is a trademark of Texas Instruments Incorporated.

SN54ALVTH16240, SN74ALVTH16240

2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCES138A – JULY 1998 – REVISED JANUARY 1999

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description (continued)

The devices can be used as four 4-bit buers, two 8-bit buffers, or one 16-bit buer. The devices provide

inverting outputs and symmetrical active-low output-enable (OE) inputs.

When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;

the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or oating data inputs at a valid logic level.

The SN54ALVTH16240 is characterized for operation over the full military temperature range of –55°C to

125°C. The SN74ALVTH16240 is characterized for operation from –40 C to 85 C.° °

FUNCTION TABLE

(each 4-bit buer)

INPUTS OUTPUT

OE A Y

L H L

L L H

H X Z

logic symbol†

1A1 46

1A2 44

1A3

1A4

1Y1

1Y2

1Y3

1Y4

2A1 40

2A2

2A3 37

2A4

2Y1

2Y2

2Y3

2Y4

3A1

3A2 33

3A3

3A4

3Y1

3Y2

3Y3

3Y4

4A1 29

4A2

4A3 26

4A4

4Y1

4Y2

4Y3

4Y4

EN1

EN4

1OE

2OE

3OE

4OE

EN2

EN3

†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

1 1

1 2

1 3

1 4

SN54ALVTH16240, SN74ALVTH16240

2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS

WITH 3-STATE OUTPUTS

SCES138A – JULY 1998 – REVISED JANUARY 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

logic diagram (positive logic)

1OE

1A1

1A2

1A3

1A4

1Y1

1Y2

1Y3

1Y4

2OE

2A1

2A2

2A3

2A4

2Y1

2Y2

2Y3

2Y4

3OE

3A1

3A2

3A3

3A4

3Y1

3Y2

3Y3

3Y4

4OE

4A1

4A2

4A3

4A4

4Y1

4Y2

4Y3

4Y4

absolute maximum ratings over operating free-air temperature range (unless otherwise noted) †

Supply voltage range, VCC –0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high-impedance

or power-o state, VO (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high state, V O (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . .

Output current in the low state, IO : SN54ALVTH16240 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74ALVTH16240 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output current in the high state, IO : SN54ALVTH16240 –48 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SN74ALVTH16240 –64 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): DGG package 89 C/W°. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DGV package 93 C/W°. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DL package 94 C/W°. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg –65°C to 150 C°. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51.

Produktspezifikationen

Marke:	Texas Instruments
Kategorie:	Nicht kategorisiert
Modell:	SN74ALVTH16240DL
Breite:	16 mm
Tiefe:	7.59 mm
Höhe:	2.54 mm
Betriebstemperatur:	-40 - 85 °C
Verpackungsbreite:	14.24 mm
Verpackungstiefe:	473.7 mm
Verpackungshöhe:	5.11 mm
Typ:	Logik-IC
Menge pro Packung:	25 Stück(e)
Verpackungsart:	SSOP
Temperaturbereich bei Lagerung:	-65 - 150 °C
Anzahl Pins:	48
Breite (mit Pins):	16 mm
Tiefe (mit Pins):	10.67 mm
Höhe (mit Pins):	2.79 mm