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Data sheet acquired from Harris Semiconductor

SCHS240A

Features

• Buered Inputs

• Typical Propagation Delay

- 6ns at VCC = 5V, TA = 25oC, CL = 50pF

• Exceeds 2kV ESD Protection MIL-STD-883, Method

3015

• SCR-Latchup-Resistant CMOS Process and Circuit

Design

• Speed of Bipolar FAST™/AS/S with Signiﬁcantly

Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and

Balanced Noise Immunity at 30% of the Supply

• 24mA Output Drive Current±

- Fanout to 15 FAST™ ICs

- Drives 50 Transmission LinesΩ

Description

The ’AC164 and ’ACT164 are 8-bit serial-in/parallel-out shift

registers with asynchronous reset that utilize Advanced

CMOS Logic technology. Data is shifted on the positive edge

of the clock (CP). A LOW on the Master Reset (MR) pin

resets the shift register and all outputs go to the LOW state

regardless of the input conditions. Two Serial Data inputs

(DS1 and DS2) are provided; either one can be used as a

Data Enable control.

Pinout

CD54AC164, CD54ACT164

(CERDIP)

CD74AC164, CD74ACT164

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART

NUMBER

TEMP.

RANGE (oC) PACKAGE

CD54AC164F3A -55 to 125 14 Ld CERDIP

CD74AC164E -55 to 125 14 Ld PDIP

CD74AC164M -55 to 125 14 Ld SOIC

CD54ACT164F3A -55 to 125 14 Ld CERDIP

CD74ACT164E -55 to 125 14 Ld PDIP

CD74ACT164M -55 to 125 14 Ld SOIC

NOTES:

1. When ordering, use the entire part number. Add the sux 96 to

obtain the variant in the tape and reel.

2. Wafer and die for this part number is available which meets all elec-

trical specifications. Please contact your local TI sales office or cus-

tomer service for ordering information.

DS1

DS2

GND

VCC

September 1998 - Revised May 2000

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

FAST™ is a Trademark of Fairchild Semiconductor.

CD54/74AC164,

CD54/74ACT164

8-Bit Serial-In/Parallel-Out Shift Register

[ /Title

(CD74

AC164

CD74

ACT16

/Sub-

ject (8-

Bit

Serial-

In/Par-

allel-

Out

Shift

Regis-

ter)

/Autho

r ()

/Key-

words

(Har-

ris

Semi-

con-

ductor,

Advan

ced

CMOS

, Harris

Semi-

con-

ductor,

Advan

ced

TTL)

/Cre-

ator ()

Functional Diagram

MODE SELECT - TRUTH TABLE

OPERATING MODE

INPUTS OUTPUTS

MR CP DS1 DS2 Q0 Q1 - Q7

RESET (CLEAR) L X X X L L - L

SHIFT H l l L q0 - q6↑

H l h L q0 - q6↑

H h l L q0 - q6↑

H h h H q0 - q6↑

H = HIGH voltage level steady state.

L = LOW voltage level steady state.

h = HIGH voltage level one setup time prior to the LOW-to_HIGH clock transition.

l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition.

X = Don’t care.

q = Lowercase letters indicate the state of the referenced output prior to the LOW-to-HIGH clock transition.

↑= LOW-to-HIGH clock transition.

DS1

9 8

DS2

GND = 7

VCC = 14

CD54/74AC164, CD54/74ACT164

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, IIK

For VI < -0.5V or VI > VCC + 0.5V 20mA. . . . . . . . . . . . . . . . . . . . . .±

DC Output Diode Current, IOK

For VO < -0.5V or V

O > VCC + 0.5V 50mA . . . . . . . . . . . . . . . . . . . .±

DC Output Source or Sink Current per Output Pin, I

For VO > -0.5V or V

O < VCC + 0.5V 50mA . . . . . . . . . . . . . . . . . . . .±

DC VCC or Ground Current, ICC or IGND (Note 3) 100mA . . . . . . . . .±

Operating Conditions

Temperature Range, T

A . . . . . . . . . . . . . . . . . . . . . . -55

oC to 125oC

Supply Voltage Range, V

CC (Note 4)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, V

I, VO . . . . . . . . . . . . . . . . . 0V to VCC

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

Thermal Resistance (Typical, Note 5) θ

JA (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150

Maximum Storage Temperature Range . . . . . . . . . .-65

oC to 150oC

Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300

(SOIC - Lead Tips Only)

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

3. For up to 4 outputs per device, add 25mA for each additional output.±

4. Unless otherwise speciﬁed, all voltages are referenced to ground.

5. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Speciﬁcations

PARAMETER SYMBOL

TEST

CONDITIONS VCC

(V)

25oC

-40oC TO