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SN54AHC138, SN74AHC138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCLS258L − DECEMBER 1995 − REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

DOperating Range 2-V to 5.5-V VCC

DDesigned Specifically for High-Speed

Memory Decoders and Data-Transmission

Systems

DIncorporate Three Enable Inputs to Simplify

Cascading and/or Data Reception

DLatch-Up Performance Exceeds 250 mA Per

JESD 17

DESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

− 1000-V Charged-Device Model (C101)

3 2 1 20 19

9 10 11 12 13

G2A

G2B

GND

SN54AHC138 . . . FK PACKAGE

(TOP VIEW)

NC − No internal connection

G2A

G2B

GND

VCC

SN54AHC138 . . . J OR W PACKAGE

SN74AHC138 . . . D, DB, DGV, N, NS,

OR PW PACKAGE

(TOP VIEW)

SN74AHC138 . . . RGY PACKAGE

(TOP VIEW)

1 16

8 9

G2A

G2B

Y6 V

GND

description/ordering information

The ’AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing

applications that require very short propagation-delay times. In high-performance memory systems, these

decoders can be used to minimize the effects of system decoding. When employed with high-speed memories

utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are

less than the typical access time of the memory. This means that the effective system delay introduced by the

decoders is negligible.

ORDERING INFORMATION

TAPACKAGE†ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

QFN − RGY Tape and reel SN74AHC138RGYR HA138

PDIP − N Tube SN74AHC138N SN74AHC138N

SOIC D

Tube SN74AHC138D

AHC138

SOIC − D Tape and reel SN74AHC138DR AHC138

−40° °C to 85 C SOP − NS Tape and reel SN74AHC138NSR AHC138

SSOP − DB Tape and reel SN74AHC138DBR HA138

TSSOP PW

Tube SN74AHC138PW

HA138

TSSOP − PW Tape and reel SN74AHC138PWR HA138

TVSOP − DGV Tape and reel SN74AHC138DGVR HA138

CDIP − J Tube SNJ54AHC138J SNJ54AHC138J

−55° °C to 125 C CFP − W Tube SNJ54AHC138W SNJ54AHC138W

55 C

125 C

LCCC − FK Tube SNJ54AHC138FK SNJ54AHC138FK

†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines

are available at www.ti.com/sc/package.

On products compliant to MIL-PRF-38535, all parameters are tested

unless otherwise noted. On all other products, production

processing does not necessarily include testing of all parameters.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

SN54AHC138, SN74AHC138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCLS258L − DECEMBER 1995 − REVISED JULY 2003

2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

description/ordering information (continued)

The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two

active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.

A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one

inverter. An enable input can be used as a data input for demultiplexing applications.

FUNCTION TABLE

ENABLE INPUTS SELECT INPUTS OUTPUTS

G1 G2A G2B C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7

X H X X X X H H H H H H H H

X X H X X X H H H H H H H H

L X X X X X H H H H H H H H

H L L L L L L H H H H H H H

H L L L L H H L H H H H H H

H L L L H L H H L H H H H H

H L L L H H H H H L H H H H

H L L H L L H H H H L H H H

H L L H L H H H H H H L H H

H L L H H L H H H H H H L H

H L L H H H H H H H H H H L

logic diagram (positive logic)

G2B

G2A

Data

Outputs

Select

Inputs

Enable

Inputs

Pin numbers shown are for the D, DB, DGV, J, N, NS, PW, RGY, and W packages.

SN54AHC138, SN74AHC138

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SCLS258L − DECEMBER 1995 − REVISED JULY 2003

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†

Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, VI (see Note 1) −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Note 1) −0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0) −20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous current through VCC or GND ±75 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance, θJA (see Note 2): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): DB package 82°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): DGV package 120°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 2): PW package 108°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(see Note 3): RGY package 39°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, Tstg −65° °C to 150 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The package thermal impedance is calculated in accordance with JESD 51-7.

3. The package thermal impedance is calculated in accordance with JESD 51-5.

recommended operating conditions (see Note 4)

SN54AHC138 SN74AHC138

UNIT

MIN MAX MIN MAX UNIT

VCC Supply voltage 2 5.5 2 5.5 V

VCC = 2 V 1.5 1.5

VIH High-level input voltage VCC = 3 V 2.1 2.1 V

VIH

High level

input

voltage

VCC = 5.5 V 3.85 3.85

VCC = 2 V 0.5 0.5

VIL Low-level input voltage VCC = 3 V 0.9 0.9 V

VIL

Low level

input

voltage

VCC = 5.5 V 1.65 1.65

VIInput voltage 0 5.5 0 5.5 V

VOOutput voltage 0 VCC 0 VCC V

VCC = 2 V −50 −50 Am

IOH High-level output current VCC = 3.3 V 0.3 V±−4 −4

IOH

High level

output

current

VCC = 5 V ±0.5 V −8 −8 mA

VCC = 2 V 50 50 Am

IOL Low-level output current VCC = 3.3 V ±0.3 V 4 4

IOL

Low level

output

current

VCC = 5 V ±0.5 V 8 8 mA

Δ Δt/

I t t iti i f ll t

VCC = 3.3 V 0.3 V±100 100

Δ Δt/ v Input transition rise or fall rate VCC = 5 V ±0.5 V 20 20 ns/V

TAOperating free-air temperature −55 125 −40 85 C°

NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

Produktspezifikationen

Marke:	Texas Instruments
Kategorie:	Nicht kategorisiert
Modell:	SN74AHC138N
Breite:	19.69 mm
Tiefe:	6.6 mm
Höhe:	4.57 mm
Betriebstemperatur:	-40 - 85 °C
Verpackungsbreite:	13.97 mm
Verpackungstiefe:	506 mm
Verpackungshöhe:	11.23 mm
Typ:	Logik-IC
Menge pro Packung:	25 Stück(e)
Verpackungsart:	PDIP
Temperaturbereich bei Lagerung:	-65 - 150 °C
Anzahl Pins:	16
Breite (mit Pins):	19.69 mm
Tiefe (mit Pins):	10.92 mm
Höhe (mit Pins):	8.26 mm