Microchip PIC24FJ128GC010 Bedienungsanleitung

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2009-2012 Microchip Technology Inc. DS39970E-page 1
PIC24FJXXXDA1/DA2/GB2/GA3/GC0
1.0 DEVICE OVERVIEW
This document defines the programming specification
for the PIC24FJXXXDA1/DA2/GB2/GA3/GC0 families
of 16-bit microcontrollers (MCUs). This programming
specification is required only for those developing pro-
gramming support for the PIC24FJXXXDA1/DA2/GB2/
GA3/GC0 families. Customers using only one of these
devices should use development tools that already
provide support for device programming.
This specification includes programming specifications
for the following devices:
Topics covered include:
1.0 Device Overview .......................................................1
2.0 Programming Overview of the
PIC24FJXXXDA1/DA2/GB2/GA3/GC0 Families.......... 2
3.0 Device Programming ICSP................................... 18
4.0 Device Programming Enhanced ICSP .................. 33
5.0 The Programming Executive ................................... 51
6.0 Device Details ......................................................... 63
7.0 AC/DC Characteristics and Timing Requirements......... 66
• PIC24FJ128DA106 • PIC24FJ256DA106
• PIC24FJ128DA110 • PIC24FJ256DA110
• PIC24FJ128DA206 • PIC24FJ256DA206
• PIC24FJ128DA210 • PIC24FJ256DA210
• PIC24FJ128GB206 • PIC24FJ256GB206
• PIC24FJ128GB210 • PIC24FJ256GB210
PIC24FJ64GA310 PIC24FJ128GA310
PIC24FJ64GA308 PIC24FJ128GA308
PIC24FJ64GA306 PIC24FJ128GA306
PIC24FJ64GC010 PIC24FJ128GC010
PIC24FJ64GC008 PIC24FJ128GC008
PIC24FJ64GC006 PIC24FJ128GC006
PIC24FJXXXDA1/DA2/GB2/GA3/GC0 Families Flash
Programming Specication
PIC24FJXXXDA1/DA2/GB2/GA3/GC0
DS39970E-page 2 2009-2012 Microchip Technology Inc.
2.0 PROGRAMMING OVERVIEW
OF THE PIC24FJXXXDA1/DA2/
GB2/GA3/GC0 FAMILIES
There are two methods of programming the
PIC24FJXXXDA1/DA2/GB2/GA3/GC0 families of
devices discussed in this programming specification.
They are:
In-Circuit Serial Programming™ (ICSP™)
Enhanced In-Circuit Serial Programming
(Enhanced ICSP)
The ICSP programming method is the most direct
method to program the device; however, it is also the
slower of the two methods. It provides native, low-level
programming capability to erase, program and verify
the chip.
The Enhanced In-Circuit Serial Programming
(Enhanced ICSP) protocol uses a faster method that
takes advantage of the Programming Executive (PE),
as illustrated in Figure 2-1. The Programming Execu-
tive provides all the necessary functionality to erase,
program and verify the chip through a small command
set. The command set allows the programmer to
program the PIC24FJXXXDA1/DA2/GB2/GA3/GC0
MCUs without having to deal with the low-level
programming protocols of the chip.
FIGURE 2-1: PROGRAMMING SYSTEM
OVERVIEW FOR
ENHANCED ICSP™
This specification is divided into major sections that
describe the programming methods independently.
Section 3.0 “Device Programming ICSP describes
the In-Circuit Serial Programming method. Section 4.0
“Device Programming Enhanced ICSP” describes
the Run-Time Self-Programming (RTSP) method.
Note: The address of Special Function Register,
TBLPAG, has changed from 0x32 to 0x54
in PIC24FJXXXDA1/DA2/GB2/GA3/GC0
family devices.
In those cases where legacy programming
specification code from other device
families is used as a basis to implement
the PIC24FJXXXDA1/DA2/GB2/GA3/GC0
families’ programming specification, spe-
cial care must be taken to ensure all
references to TBLPAG, in any existing
code, are updated with the correct opcode
hex data for the mnemonic and operands
(as shown below).
PIC24FJXXXDA1/DA2/GB2/GA3/GC0 Families
All Other PIC24F Families
Command
(Binary)
Data
(Hex) Description
0000 MOV W0, TBLPAG 8802A0
Command
(Binary)
Data
(Hex) Description
0000 MOV W0, TBLPAG 880190
PIC24F Devices
Programmer Programming
Executive
On-Chip Memory
2009-2012 Microchip Technology Inc. DS39970E-page 3
PIC24FJXXXDA1/DA2/GB2/GA3/GC0
2.1 Power Requirements
All PIC24FJXXXDA1/DA2/GB2/GA3/GC0 devices
power their core digital logic at a nominal 1.8V. To
simplify system design, all devices in the
PIC24FJXXXDA1/DA2/GB2/GA3/GC0 families incor-
porate an on-chip regulator that allows the device to
run its core logic from VDD. For the PIC24F128GA310
and PIC24FJ128GC010 families, the regulator is always
enabled, so there is no ENVREG pin on these devices.
The regulator provides power to the core from the other
VDD pins. A low-ESR capacitor (such as ceramic or tan-
talum) must be connected to the VCAP pin (see Table 2-1
and Figure 2-2). This helps to maintain the stability of the
regulator. The specifications for core voltage and capac-
itance are listed in Section 7.0 “AC/DC Characteristics
and Timing Requirements.
2.2 Program Memory Write/Erase
Requirements
The Flash program memory on PIC24FJXXXDA1/DA2/
GB2/GA3/GC0 devices has a specific write/erase
requirement that must be adhered to for proper device
operation. Any given word in memory must not be
written more than twice before erasing the page where
it is located. Thus, the easiest way to conform to this
rule is to write all of the data in a programming block,
within one write cycle. The programming methods
specified in this specification comply with this
requirement.
FIGURE 2-2: CONNECTIONS FOR THE
ON-CHIP REGULATOR
FIGURE 2-3: CONNECTIONS FOR THE
VBAT PIN
TABLE 2-1: PIN DESCRIPTIONS (DURING PROGRAMMING)
Note: Writing to a location multiple times without
erasing is not recommended.
VDD
ENVREG
VCAP
VSS
PIC24FJXXXDA1/DA2/GB2
CEFC
3.3V
Regulator Enabled (ENVREG tied to VDD):
(10 F typ)
VDD
VBAT
VCAP
VSS
PIC24FJXXXGA3/GC0
CEFC
3.3V
Regulator Enabled (VBAT tied to VDD or a Battery):
(10 F typ)
Pin Name
During Programming
Pin Name Pin Type Pin Description
MCLR MCLR P Programming Enable
ENVREG( )1ENVREG( )1I Enable for On-Chip Voltage Regulator
VDD, AV and SVDD DD( )2VDD P Power Supply
VSS, AVSS and SVSS( )2VSS P Ground
VCAP CAPV P On-Chip Voltage Regulator Output to the Core
PGECx PGECx I Programming Pin Pairs 1, 2 and 3: Serial Clock
PGEDx PGEDXI/O Programming Pin Pairs 1, 2 and 3: Serial Data
Legend: I = Input, O = Output, P = Power
Note 1: There is no ENVREG pin in the PIC24FJ128GA310 and PIC24FJ128GC010 families. The regulator is
always enabled and the ENVREG pin is replaced by the VBAT pin. It is recommended to connect the VBAT
pin to the battery or VDD during programming.
2: All power supply and ground pins must be connected, including analog supplies and ground (AVDD/AVSS
and SVDD/SVSS, where implemented).


Produktspezifikationen

Marke: Microchip
Kategorie: Nicht kategorisiert
Modell: PIC24FJ128GC010

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